This is true. I'm not sure it is true in all the examples you gave, but it is true for some multi-core processors.
Part of AMD's multi-core Phenom blast today is the Phenom X3 8000, "the world's only triple-core x86 processor," which we heard about a few months ago. They're supposed to bargain chips for budget consumers, but they're a nicer bargain for AMD, actually, since it lets them dump bug-plagued quad-core Phenoms by disabling a core.
This article says the practice is used by Intel as well:
The reason for this is that the disabled cores are turned off for a reason: they failed factory tests. Cores can fail for any number of reasons, including defects in the silicon, problems running at full frequency, or a bug introduced during manufacturing. Both AMD and Intel disable CPU cores for this very reason.
This article shows the practice is also used by AMD with L3 cache:
When AMD produces a Phenom II die if part of the L3 is bad, it gets disabled and is sold as an 800 series chip. If one of the cores is bad, it gets disabled and is sold as a 700 series chip. If everything is in working order, then we've got a 900.
Intel has done this with entire on-board graphics processors (reference):
Intel recently released a couple of Ivy Bridge based processors that have disabled the integrated graphics completely, the 3350P being one of them. This allows Intel to sell processor die that might have a defect on the GPU portion to increase the relative yield rate of their 22nm process and also gives them another weapon to fight off any pricing competition from AMD.
IBM holds a patent (US7610437) on a particular method for doing this:
If a defect is detected in a single functional unit, such as a synergistic processor core, the defective synergistic processor core can be disabled and the multiprocessor can still be used with the remaining functional unit(s) as a partial good multiprocessor chip.
For example, if a single processing unit is defective, the defective processing core can be disabled and the multiprocessor can still be used with the remaining functional processing unit(s). Such a multiprocessor chip is a partial good multiprocessor.
One of their claims points to the mechanism for doing this:
blowing a fuse associated with each defective processor core to disable each defective processor core if the number of defective processor cores does not exceed the threshold.
From a presentation by Intel and University of Michigan:
Defective core options: disable or salvage. Disabling wastes entire core even for minor defect.
This is a common enough practice that some hardware research focuses on making use of those faulty cores: Putting Faulty Cores to Work. In that article, they make a statement about how common disabling is:
Due to the inherent irregularity of the non-cache parts of the core, it is well known that handling defects in these parts is challenging. A common solution is to disable the faulty core.